JOP - Java Optimized Processor

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The Jopcore ACEX board is now released under GPL. Available at: opencores.org.

Jopcore FPGA Board

This board is ideal to start with JOP, but can also be used for general FPGA designs. Static RAM and FLASH are connected to the FPGA. All unused pins (56) and the serial line are available via four connectors.

The FPGA is ACEX 1K50TC144 is a 'low cost' chip from Altera, supported by their free version of Quartus and Max+Plus II.

The Flash can be used to store configuration data for the FPGA and application program/data. The FPGA can be configured with a ByteBlasterMV download cable or loaded from the flash (with a small cpld on board).

The board is a little different from other FPGA prototyping boards: The board has the connectors (female) on the bottom side. So it can be used as a module (60mm x 48mm) being part of a larger board with the periphery.

I'm using this board for JOP a 32 bit Java processor and there is enough room in the FPGA for UART, ISA interface (e.g. for ethernet with CS8900), sigma delta ADC,.. You can find VHDL files for this processor and the periphery in the Download section.

The board is not only useful for FPGA prototyping, but is a ready to use module for your application board. Ask for price on larger quantities.

The size of the PCB is: 60mm x 48mm.

The board contains:

Altera ACEX 1K50TC144-3 FPGA (see data sheet)

voltage regulators (3V3, 2V5)

crystal clock (20 MHz)

512KB Flash (for FPGA configuration and program)

128KB Ram

byteblaster port

watchdog with led

EPM7032 PLD to load FPGA from flash (on watchdog reset)

serial interface (MAX323A)

56 general IO pins

Schematic:

PCB library

Baseio Expansion Board

Baseio is an IO extension for Jopcore and Cycore. Its main purpose is to provide a complete Java Processor system with Internet connection for JOP. But it can be used just for any (FPGA) project where you need Ethernet connection.

A step down switching regulator with a large AC/DC input range supplies Jopcore.

All input and output pins are EMC/ESD protected and routed to large connectors (5.08 mm Phoenix).

Analog comperators can be used to build sigma delta ADCs. VHDL source can be found in the download section.

For FPGA projects with network connection a CS8900 Ethernet controller with RJ 45 connector is on board. Java sources for CS8900 driver and a simple TCP/IP stack are available.

The size of the PCB is: 99mm x 82mm.

The board contains:

Cirrus Logic CS8900 10Base-T Ethernet Controller (see data sheet)

step down regulator for 8V to 24V AC/DC supply

9 pin male connector for RS232

RJ 45 connector for Ethernet

10 EMC/ESD protected digital inputs

2 EMC/ESD protected analog inputs

4 EMC/ESD protected digital outputs (OC)

expansion connector

Schematic:

Simpexp Expansion Board

Simpexp is a cheap IO extension to get started with Jopcore or Cycore. It contains a linear 3.3V regulator and serial connector.
On the prototyping area around and under the core you can add your peripherials.

Schematic
Board Layout

Now available

Price and Online Order:

Jopcore FPGA board	EUR  75
Baseio expansion board	EUR  180
Simpexp expansion board	EUR  55
Order Online

Martin Schoeberl
Strausseng. 2-10/2/55
A-1050 Vienna
AUSTRIA

e-mail: martin.schoeberl@chello.at
phone: +43 1 952 02 20